1. Field of the Invention
The present invention relates to microcomputer systems and more specifically, toward instruments that test and debug hardware and software by emulating and controlling those microcomputer systems through a technique known as in-circuit emulation.
2. Art Background
Microprocessors require very thorough and speedy testing by external emulators before they are employed in computer systems for production and sale. Thus, in order to sharply curtail the testing time required for microprocessors, the computer industry developed a now well-known emulation technique frequently referred to as in-circuit-emulation that enhances the system test and debug process.
In-circuit-emulation is a system which includes a peripheral device referred to as an in-circuit-emulator (ICE) that is embedded within a target microprocessor system which is implicitly aware of the target microprocessor's operations and can generate real-time trace information for reconstructing processor execution in an external host emulator. An ICE system employs its own ICE bus, separate from normal data, address or control busses found on the microprocessor integrated circuit, so as not to interfere with processor behavior while the ICE system generates trace information. An ICE system also utilizes a probe tip, an external host, and a workstation where the probe tip functions as an interface between the ICE and the external host which are connected by a cable typically having an implementation dependent number of wires. The external host emulator is connected to and controlled by the workstation using any convenient parallel or serial interface. The ICE bus provides a command port interface with which the external host can interrogate and modify the state of the microprocessor or access a memory sub-system of the target microprocessor. The ICE system includes a set of debugging capabilities to facilitate and shorten the debugging process. By using an ICE system, engineers can more effectively control the external emulation of a microprocessor application during the debugging process.
However, in order to control the operation of the ICE and the microprocessor, control signals are required to provide handshaking signals between the host emulator and the target microprocessor. These handshaking signals communicate what steps the target and host should perform next in the debugging process.
Two of the ICE modes present in certain microprocessors, such as the Intel 80960 family of processors are emulation and interrogation mode. During emulation mode, the target processor executes application code normally, and outputs trace information on an 8-bit ICE bus with each core clock cycle. This trace information aids in reconstructing exact target processor operation during a given period of time. Trace information is output in 8-bit quantities known as trace messages. Since the ICE bus is physically distinct from the target microprocessor's address and data bus, trace messages are output clock-by-clock without significantly impacting processor performance. These trace messages are captured in a trace collection buffer for later processing by the external host emulator.
When the host emulator wishes to interrogate or modify the target processor's state, it must break processor execution of application code. To break execution, the host emulator must force the target processor to transition from emulation to interrogation mode. Once this is accomplished, the processor ceases to generate trace messages, and enters a state in which it is ready to receive and execute interrogation mode commands. Interrogation mode commands are received from the host emulator over the ICE bus and processed by an on-chip microcode program monitor which then assumes control of the target processor. These commands may be used to interrogate or modify processor state as well as to access target processor memory.
Several problems exist with in-circuit emulation as currently embodied in existing microprocessors such as the Intel 80960 CX. First, it is difficult to redirect the ICE bus to issue the break request command at high frequency. Second, several instructions of application code may execute after the break request command is issued, but before the processor actually transitions to interrogation mode. This leads to a problem known as breakpoint skid. Third, it is difficult to redirect the ICE bus at high frequencies to issue requests for address marks, which indicates the current location of the target processor's instruction pointer. External hardware has been traditionally required to issue address mark requests on a periodic basis. Finally, with the increasing speed of microprocessors, for instance 66 MHz with Intel 80960 HX and JX microprocessors, the microprocessors must somehow aid external logic in capturing trace messages issued at these high frequencies since current emulators are currently capable of supporting frequencies only up to around 40 MHz.